Rémi Verschelde 0e53dd642c Fix MSVC warning C4706: assignment within conditional expression ...

Part of #66537.

2022-09-28 16:05:07 +02:00

..

doc_classes

Rename the argument tag to param in XML documentation

2022-08-08 22:34:31 +03:00

config.py

[Scons] Implement module dependency sorting.

2022-08-04 20:00:19 +02:00

register_types.cpp

Refactor module initialization

2022-05-04 17:34:51 +02:00

register_types.h

Refactor module initialization

2022-05-04 17:34:51 +02:00

SCsub

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video_stream_theora.cpp

Fix MSVC warning C4706: assignment within conditional expression

2022-09-28 16:05:07 +02:00

video_stream_theora.h

Change time parameters and variables to double type

2022-09-26 13:52:54 -05:00